TA2469

Platform Power Management Opportunities for Virtualization

Server platforms are beginning to provide opportunities for virtualization software to manage power consumption more dynamically and at a finer granularity than traditional native operating systems. New hardware mechanisms allow dynamic power management to individual processor cores, I/O devices, memory channels, and DIMMs. A hypervisor, such as VMware ESX Server, working in concert with platform firmware and processor technology can exploit these new mechanisms in the future to produce significant power-savings for the platform.
This session will first review state-of-the-art coarse-grain power management directions for VMware ESX. A survey of future fine-grain platform power management mechanisms and their possible usages by a hypervisor will follow. The session will conclude with a review of actual power-saving results gathered from an experimental hypervisor and prototype platforms implementing these new mechanisms.

Technical Overview Session

Networking; Storage / Backup; VMware Infrastructure; Virtualization Platform / Hypervisor

1 Hour

Sunil Saxena( IntelCorporation ), Richard Brunner( VMware, Inc. )

Richard A. Brunner is the Chief Platform Architect in the
CTO office at VMware, Inc. He is responsible for defining and driving future platform features that can benefit
virtualization. Richard has over 27 years experience in the
computer industry working as an architect for IBM, DEC,
Intel, and AMD. Richard holds MSCE and BSEE degrees. He holds patents in Computer Architecture and has presented extensively at events such as VMworld, Hot Chips, Siggraph, WinHec, Linux Kernel Summit, Linux World, Ottawa Linux Symposium, and Intel Developers Forum.

Key Virtualization Visionary at Intel Corporation, Dr. Sunil
Saxena is a Senior Principal Engineer and Chief Architect,
in the Software Solutions Group. In this role, he drives
processors enhancements and virtualization development in
the industry. Dr. Saxena earned his Ph.D. in Computer
Science from the University of Waterloo after receiving his
B. Tech in Electrical Engineering from the Indian Institute
of Technology, Delhi in 1975. He has been
instrumental in creating and enhancing the value of Intel's
silicon and platforms through innovations in software
technology.